About

My name is Sherman, and I am a second-year PhD student in the Computer Science Department (CSD) at Carnegie Mellon University, advised by Prof. George Amvrosiadis in the Parallel Data Lab (PDL).

I’m broadly interested in the design and implementation of software systems. These days, I’m especially intrigued by how emerging memory technologies might address the memory wall, and how software systems should be redesigned for this new hardware. I’m currently co-designing LLM inference systems for future AI accelerators with High Bandwidth Flash (HBF) memory.

Before CMU, I spent two years building latency-critical C++ systems for high-frequency trading as a software engineer at Jump Trading. I also did research on accelerating memory-disaggregated data systems using data processing units (DPUs) with Prof. Jialin Li and, further back, on QUIC congestion control with Prof. Ben Leong, at the National University of Singapore. I received my Bachelor in Computer Science from NUS.

Refer to my CV for more details.

Publications

PD3: Prefetching Data with DPUs for Disaggregated Memory
Sidharth Sankhe, Felix Zhang, Umayrah Chonee, Sherman Lim, Jiasheng Hu, Jialin Li, Qizhen Zhang
Proceedings of the 23rd USENIX Symposium on Networked Systems Design and Implementation (NSDI ‘26)

Understanding Speciation in QUIC Congestion Control
Ayush Mishra, Sherman Lim, Ben Leong
Proceedings of the 22nd ACM Internet Measurement Conference (IMC ‘22)